This paper describes a digital signal processing (DSP) method for achieving “ideal” amplification, maximizing both the average output signal power and power-added-efficiency for any signal waveform and any power amplifier (PA) transfer characteristic. Detailed algorithms are described for optimally accomplishing peak reduction (PR), predistortion (PD) linearization, and integration of these DSP techniques with envelope tracking PAs. Hardware characterization results validate the theories of PD and PR operation.

The use of digital predistortion for linearizing a millimeter-wave power amplifier (PA) is investigated. A PA operating at 38 GHz is designed using an accurate non-quasi-static transistor model, taking into account both short- and long-term memory effects. A realistic test signal is then used for the identification of a nonlinear auto-regressive moving average (NARMA) behavioral model of the PA. The NARMA-based digital predistorter is then derived and formulated in terms of basic predistortion cells, especially suitable for efficient implementation in an FPGA. The performance of the predistortion solution is preliminarily assessed by means of computer simulations.