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Kelvin Test Structure Modeling of Metal-Silicide-Silicon Contacts

Published online by Cambridge University Press:  10 February 2011

G. K. Reeves
Affiliation:
Dept. of Communication and Electronic Eng, RMIT, Melbourne, Vic. 3001 Australia
A. S. Holland
Affiliation:
Dept. of Communication and Electronic Eng, RMIT, Melbourne, Vic. 3001 Australia
P. W. Leech
Affiliation:
Division of Manufacturing Science Technology, CSIRO, Clayton, Vic. 3169, Australia
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Abstract

Low resistance ohmic contacts for silicon devices commonly incorporate silicide materials as part of the contact. The electrical characterisation of ohmic contacts requires the use of various test structures such as the Cross Kelvin Resistor in order to determine the specific contact resistance ρc. This paper describes the results of using a three-dimensional finite element model of a Kelvin Resistor test structure in order to determine the influence of the electrical and geometrical parameters of a silicide-well on the magnitude of ρc. The same model of the test structure is further used to model the current density in the contact region. The results indicate that the presence of a silicide-well leads to reduced values of both ρc and the current density.

Type
Research Article
Copyright
Copyright © Materials Research Society 1998

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References

REFERENCES

[1] Proctor, S. J., Linholm, L. W. and Mazer, J. A., IEEE Trans. Electron. Devices, vol. ED–30, no.11, pp.15351542. (1983).Google Scholar
[2] Loh, W. M., Saraswat, K. and Dutton, R. W., IEEE Electron. Device Letters, vol. EDL–6, no.3, pp.105108. (1985).10.1109/EDL.1985.26061Google Scholar
[3] Osburn, C. M., Tsai, J. Y., and Sun, J., J. Electronic Mat., vol.25, pp.17251739. (1996).10.1007/s11664-996-0028-xGoogle Scholar
[4] National Technology Roadmap for Semiconductors, SIA, p. 98. (1994).Google Scholar
[5] Loh, W. M., Swirhun, S. E., Schreyer, T. A., Swanson, R. M. and Saraswat, K. C., IEEE Trans. Electron. Dev., vol. ED–34, no.3, pp.512523. (1987).Google Scholar
[6] Holland, A. S., Reeves, G. K., and Harrison, H. B., Proc. of ICMTS '97, Monterey, pp.9598. (1997).Google Scholar
[7] Lin, C. C., Chen, W. S., Hwang, H. L., Hsu, K. Y., Liou, H. K. and Tu, K. N., Applied Surface Science, vol.92, pp.660664. (1996).Google Scholar
[8] Reeves, G. K., Holland, A. S., Harrison, H. B. and Leech, P.W., Proc. of ESSDERC '97, Stuttgart, Sept. 1997. pp.492495.Google Scholar
[9] Yu, A. C., Solid-State Electron., vol.13, pp.239247. (1970).10.1016/0038-1101(70)90056-0Google Scholar
[10] Berger, H., Solid-State Electronics, vol.15, pp.145158. (1972).10.1016/0038-1101(72)90048-2Google Scholar
[11] Finetti, M., Guerri, S., Negrini, P. and Scorzoni, A., Thin Solid Films, vol.130, pp. 3745. (1985).10.1016/0040-6090(85)90294-9Google Scholar
[12] Deng, F., Johnson, R., Asbeck, P., Lau, S. S., Dubbleday, W., Hsaio, T. and Woo, J., J. Appl. Phys., vol.81, pp.80478051. (1997).Google Scholar