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This chapter first showed how electromigration for the on-chip interconnects is distinctly different from that of bulk metals. As the microelectronics technology rapidly advances following Moore’s law, electromigration becomes a key reliability problem for on-chip interconnects. This significantly changes the characteristics of electromigration, rendering thermal stresses as equally important in controlling mass transport and damage formation in the interconnects. This led to the discovery of the Blech short-length effect, establishing the concept of a critical current density-length (jLc) product as an important reliability criterion for on-chip interconnects. In this chapter, thermal stress characteristics and stress-induced void formation in passivated Al and Cu lines are investigated. The effect of dielectric confinement on thermal stress characteristics is discussed and verified by results of X-ray diffraction measurements of passivated Al and Cu lines. Then stress relaxation in passivated Al and Cu lines is discussed and correlated to stress-induced void formation.
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