In this paper, we describe the design, layout, and performance of a 6-bit TTD (true time delay) chip operating over the entire band of 2–18 GHz. The 1.15 mm2 chip is implemented using TSMC foundry 65 nm technology. The least significant bit is 1 ps. The design is based on the concept of all-pass network with some modifications intended to reduce the number of unit cells. Thus, the first three bits are implemented in a single delay cell. A peaking buffer amplifier between bit 4 and bit 5 is used for impedance matching and partial compensation of the insertion loss slope. The rms delay error of the TTD is <1 ps over most of the frequency band and insertion loss is between 2.5 and 6.3 dB for all 64 states.

Electron microscopy of enclosed liquid samples requires the thinnest possible membranes as enclosing windows as well as nanoscale liquid sample thickness to achieve the best possible resolution. Today liquid sample systems for transmission electron microscopy (TEM) are typically made from two sandwiched microchips with thin membranes. We report on a new microfabricated chip system based on a monolithic design that enables membrane geometry on the scale of a few micrometers. The design is intended to reduce membrane deflection when the system is under pressure, a microfluidic channel for improved flow geometry, and a better space angle for auxiliary detectors such as energy-dispersive X-ray spectroscopy. We explain the system design and fabrication and show the first successful TEM images of liquid samples in the chips.