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Solid Phase Epitaxy of Implanted Si-Ge-C Alloys

Published online by Cambridge University Press:  21 February 2011

Xiang Lu  and
Nathan W. Cheung
Xiang Lu
Affiliation:
Applied Science and Technology Graduate Group Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 94720
Nathan W. Cheung
Affiliation:
Applied Science and Technology Graduate Group Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 94720
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Abstract

Si1-x-yGexCy/Si heterostuctures were formed on Si (100) surface by Ge and C implantation with a high dose rate MEtal - Vapor Vacuum arc (MEVVA) ion source and subsequent Solid Phase Epitaxy (SPE). after thermal annealing in the temperature range from 600 °C to 1200 °C, the implanted layer was studied using Rutherford Back-scattering Spectrometry (RBS), cross-sectional High Resolution Transmission Electron Microscopy (HRTEM) and fourbounce X-ray Diffraction (XRD) measurement. Due to the small lattice constant and wide bandgap of SiC, the incorporation of C into Si-Ge can provide a complementary material to Si-Ge for bandgap engineering of Si-based heterojunction structure. Polycrystals are formed at temperature at and below 1000 °C thermal growth, while single crystal epitaxial layer is formed at 1100 °C and beyond. XRD measurements near Si (004) peak confirm the compensation of the Si1-x Gex lattice mismatch strain by substitutional C. C implantation is also found to suppress the End of Range (EOR) defect growth.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 388: Symposium Q – Film Synthesis and Growth Using Energetic Beams , 1995 , 195
Copyright
Copyright © Materials Research Society 1995

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References

1 Presting, H., Kibbel, H., Jaros, M., Turton, R. M., Menczigar, U., Abstreiter, G. and Grimmeiss, H. G., Semicond. Sci. Tech., 1 (1992), 1127–1148.Google Scholar
2 Verdonekt, S.-Vandebroek, Crabbe, E., Meyerson, B. S., Harame, D. L., Restle, P. J., J. C. M. Stork, and Johnson, J. B., IEEE Tran. Electron Devices, vol. 41 (1994), No. 1, 90–100.Google Scholar
3 Patton, G. L., Iyer, S. S., Delage, S. L., Tiwari, S., and Stork, J. M. C., IEEE Elec. Dev. Lett., vol. 9 (1988),No.4, 165–167.Google Scholar
4 Strane, J. W., Stein, H. J., Lee, S. R., Doyle, B. L., Picraux, S. T. and Mayer, J. W., Appl. Phys. Lett., 63 (20) 1993, 2786–2788.Google Scholar
5 Im, S., Washburn, J., Gronsky, R., Cheung, N. W., Yu, K. M., and Ager, J. W., Appl. Phys. Lett., 63 (19) 1993, 2682–2684.Google Scholar
6 Brown, I. G., Rev. Sci. INstrum., 63 (4) 1992, 2351–2356.Google Scholar
7 Brown, I. G., Feinberg, B., and Galvin, J. E., J. appl. Phys. 63 (10) 1988, 4889–4898.Google Scholar
8 Pfiester, J. R. and Alvis, J. R., IEEE Elect. Dev. Lett. vol. 9. No. 8 (1988), 391–393.Google Scholar
9 Ozturk, M. C., Wortman, J. J., Osburn, C. M., A. ajmera, Rozgonyi, G. A., E. Frey, W. Chu, and C. Lee, IEEE Tran. Elect. Dev., vol. 35, No. 5 (1988), 659–668.Google Scholar