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Physics of Novel Amorphous Silicon High-Voltage Transistor

Published online by Cambridge University Press:  26 February 2011

M. Hack
Affiliation:
Xerox Palo Alto Research Center, 3333 Coyote Hill Rd, Palo Alto, CA 94304
H. Tuan
Affiliation:
Xerox Palo Alto Research Center, 3333 Coyote Hill Rd, Palo Alto, CA 94304
J. Shaw
Affiliation:
Xerox Palo Alto Research Center, 3333 Coyote Hill Rd, Palo Alto, CA 94304
M. Shur
Affiliation:
Dept. of Electrical Engineering, University of Minnesota, Minneapolis, MN 55455
P. Yap
Affiliation:
Versatec, 2805 Bowers Ave., Santa Clara, CA 95051
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Abstract

In this paper we describe the operation of a novel amorphous silicon high voltage transistor. Its attractive feature is that it can operate at source-drain voltages in excess of 400 volts but its characteristics are controlled by applying only a low bias (0-10 volts) to a gate electrode covering a small portion of the sourcedrain channel near to the source. The portion of the device over this gate electrode operates as a conventional amorphous silicon Field-Effect Transistor which injects electrons into the intrinsic amorphous silicon between this region and the drain electrode. We present experimental data showing the current-voltage characteristics of this new transistor as a function of geometry and demonstrate that the above model realistically describes its operation.

Type
Research Article
Copyright
Copyright © Materials Research Society 1987

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