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Improvements in Zone Melt Recrystallized Soi Layers by the Use of Selective Epitaxial Growth in the Seed Windows.

Published online by Cambridge University Press:  28 February 2011

D.A. Williams ,
R.A. McMahon ,
H. Ahmed ,
L. Karapiperis ,
G. Garry ,
D. Dieumegard ,
K.M. Barfoot  and
D.J. Godfrey
D.A. Williams
Affiliation:
Microelectronics Research Laboratory, Department of Physics, Cambridge University, Cambridge Science Park, Milton Road, Cambridge, CB4 4FW. U.K.
R.A. McMahon
Affiliation:
Microelectronics Research Laboratory, Department of Physics, Cambridge University, Cambridge Science Park, Milton Road, Cambridge, CB4 4FW. U.K.
H. Ahmed
Affiliation:
Microelectronics Research Laboratory, Department of Physics, Cambridge University, Cambridge Science Park, Milton Road, Cambridge, CB4 4FW. U.K.
L. Karapiperis
Affiliation:
Laboratoire Central de Recherche, Thomson-CSF, B.P.10, Orsay, France.
G. Garry
Affiliation:
Laboratoire Central de Recherche, Thomson-CSF, B.P.10, Orsay, France.
D. Dieumegard
Affiliation:
Laboratoire Central de Recherche, Thomson-CSF, B.P.10, Orsay, France.
K.M. Barfoot
Affiliation:
GEC Research Ltd., Hirst Research Centre, East Lane, Wembley, HA9 7PP. U.K.
D.J. Godfrey
Affiliation:
GEC Research Ltd., Hirst Research Centre, East Lane, Wembley, HA9 7PP. U.K.
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Abstract

The effect of selective epitaxial growth (SEG) of silicon in the seed windows of silicon on insulator structures prior to recrystallization has been investigated. Subsequent zone melt recrystallization of these structures was performed in a dual electron beam system, and it was found that the full planarisation of the deposited silicon layer results in uniform film thickness after recrystallization. Cross sectional scanning and transmission electron microscopy, optical microscopy after defect etching, and bevelling are used to analyse the material. The SEG method improves the uniformity of the film for device island etching, and so is useful for all silicon on insulator applications, although the one of most interest for these investigations is the production of three dimensional circuitry. This is achieved by stacking layers of devices, and so planarity is particularly important.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 107: Symposium H – Silicon-on-Insulator and Buried Metals in Semiconductors , 1987 , 189
Copyright
Copyright © Materials Research Society 1988

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References

1 Hopper, G.F., Davis, J.R., McMahon, R.A. and Ahmed, H. Electron.Lett. 20(12) p500 (1984)Google Scholar
2 Smith, D.A. et al. J.App.L.Phys. In press.Google Scholar
3 McMahon, R.A., Williams, D.A., Ahmed, R. and Davis, J.R. European MRS. J.dePhys. Supp.Ser. (1987).Google Scholar
4 Ishitani, A., Kitajima, H., Tano, K. and Tsuya, H. Microelectron.Eng. 4 p333 (1986).Google Scholar
5 Jastrzebski, L. J.Crys.Growth 70, p253 (1984).CrossRefGoogle Scholar
6 Geis, M.W., Smith, H.I. and Chen, C.K. J.App.L.Phys. 60(3) p1152 (1986).Google Scholar
7 Williams, D.A., McMahon, R.A., Ahmed, R. and Stobbs, W.M. Oxford Conference on Microscopy of Semiconducting Materials. IoP Conf.Ser. (1987).Google Scholar
8 Geis, M.W., Smith, H.I., Silversmith, D.J., Mountain, R.W. and Thompson, C.V. J.Electrochem.Soc. 130(5)p1178 (1983)Google Scholar
9 Knapp, J. J.App.L.Phys. 52(7) p2584. (1985).CrossRefGoogle Scholar
10 Landman, U., Luedtke, W.D., Barnett, R.N., Cleveland, C.L., Ribarsky, M.W., Arnold, E., Ramesh, S., Baumgart, R., Martinez, A. and Khan, B. Phys.Rev.Lett. 56(2) p155 (1986)Google Scholar
11 Mitsuhashi, K. Semiconductor Equipment and Materials Symposium. El pl. SEMI, Tokyo (1986).Google Scholar