Hostname: page-component-586b7cd67f-dsjbd Total loading time: 0 Render date: 2024-11-29T07:55:38.498Z Has data issue: false hasContentIssue false
  • English
  • Français

HDP-FSG Integration in Multilevel Interconnect Devices

Published online by Cambridge University Press:  10 February 2011

Hichem M'saad ,
Manoj Vellaikal ,
Lin Zhang  and
Derek Witty
Hichem M'saad
Affiliation:
Applied Materials, Santa Clara, CA 95054.
Manoj Vellaikal
Affiliation:
Applied Materials, Santa Clara, CA 95054.
Lin Zhang
Affiliation:
Applied Materials, Santa Clara, CA 95054.
Derek Witty
Affiliation:
Applied Materials, Santa Clara, CA 95054.
Get access

Abstract

HDP-FSG has been integrated as an inter-metal dielectric in a multilevel interconnect scheme. Process regimes for obtaining stable HDP-FSG films were identified. Gap-fill of high aspect ratio structures was achieved for 0.18µm technology node. HDP-FSG film stability, homogeneity, and impurity content were evaluated. In addition to the development of the HDP-FSG process, integration of the interconnect module was investigated and optimized. Analysis of the AI/FSG interface integrity was tested for gap-fill and corrosion with SEM and for fluorine diffusion with SIMS. CMP rate of the FSG was determined and compared to HDP-USG. Al metallization integration approaches in conjunction with FSG were identified.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 564: Symposium N – Advanced Interconnects and Contacts , 1999 , 443
Copyright
Copyright © Materials Research Society 1999

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1. Loboda, M., Toskey, G., Solid State Technology, 99 (1998).Google Scholar
2. Baud, L., Passemard, G., Gobil, Y., M'Saad, H., Corte, A., Pires, F., Fugier, P., Noel, P., Rabinzohn, P., Beinglass, I., Microelectronic Engineering, 37/38, 261 (1997).Google Scholar
3. Shen, Yu-Lin, IEEE Transactions on Components, Packaging, and Manufacturing Technology- Part A, 21 (1998).Google Scholar
4. Grivna, G., Leathersich, C., Shin, H., Cowden, W., J. Vac. Sci. Technol. B 11, 55, (1993).Google Scholar
5. Hu, C.-K., Rodbell, K. P., lee, K. Y., Sullivan, T., Bouldin, D. P., Proceedings of the Sixth International Symposium on Ultra Large Scale Integration Science and Technology, 97–3, 347 (1997).Google Scholar
6. HDP-USG FT-IR spectra show the presence of a Si-OH peak at 3650 cm−1.Google Scholar
7. Loboda, M., Toskey, G., Solid State Technology, 99 (1998).Google Scholar
8. Olewine, M., Wall, R., and Colovos, G., SPIE Conference on Multilevel Interconnect Technology II, 3508 42 (1998).Google Scholar
9. Jain, V., Pramanik, D., Nariani, S. R., Chang, K. Y., VMIC Conference, 272 (1991).Google Scholar
10. Machida, K., Shimoyama, N., Takahashi, J., Takahashi, Y., Yabumoto, N., Arai, E., IEEE Transactions on Electron Devices, 41, 709 (1994).Google Scholar
11. Hasegawa, T., Kobayashi, T., Kadomura, S. and Aoyama, J., DUMIC Conference 197 (1995).Google Scholar
12. Shimooka, Y., Matsuno, T., Ui, A., Miyajima, H., Kaji, N., Nojo, H., Tateyama, Y., and Shibata, H., VMIC Conference, 119 (1997).Google Scholar