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A Novel Self-Aligned Field Induced Drain Polycrystalline Silicon Thin Film Transistor Fabricated by using a Selective Side Etch Process

Published online by Cambridge University Press:  01 February 2011

Ta-Chuan Liao ,
Chun-Yu Wu ,
Feng-Tso Chien ,
Chun-Chien Tsai ,
Hsiu-Hsin Chen ,
Chung-Yuan Kung  and
Huang-Chung Cheng
Ta-Chuan Liao
Affiliation:
[email protected], National Chiao-Tung University, Institute of Electronics, 1001 Ta Hsueh Road, Hsinchu, Taiwan 300, ROC, Hsinchu, Taiwan, 300, Taiwan
Chun-Yu Wu
Affiliation:
[email protected], National Chung Hsing University, Department of Electrical Engineering, No. 250 Kuo Kuang Rd., Taichung, 402, Taiwan
Feng-Tso Chien
Affiliation:
[email protected], Feng Chia University, Department of Electronic Engineering, No. 100 Wenhwa Rd., Taichung, 407, Taiwan
Chun-Chien Tsai
Affiliation:
[email protected], National Chiao Tung University, Institute of Electronics, No. 1001 Ta Hsueh Rd., Hsinchu, 300, Taiwan
Hsiu-Hsin Chen
Affiliation:
[email protected], National Chiao Tung University, Institute of Electronics, No. 1001 Ta Hsueh Rd., Hsinchu, 300, Taiwan
Chung-Yuan Kung
Affiliation:
[email protected], National Chung Hsing University, Department of Electrical Engineering, No. 250 Kuo Kuang Rd., Taichung, 402, Taiwan
Huang-Chung Cheng
Affiliation:
[email protected], National Chiao Tung University, Institute of Electronics, No. 1001 Ta Hsueh Rd., Hsinchu, 300, Taiwan
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Abstract

A novel T-shaped-gated (T-Gate) polycrystalline silicon thin-film transistor (poly-Si TFT) with vacuum gaps has been proposed and fabricated only with a simple process. The T-Gate structure is formed only by a selective undercut-etching technology of the Mo/Al bi-layers. Then, vacuum gaps are in-situ embedded in this T-Gate structure subsequent to capping the SiH4-based passivation oxide under the vacuum process chamber. Experimental results reveal that the proposed T-Gate poly-Si TFTs have excellent electrical performance, which has higher maximum on-off current ratio of 4.6 e107, and the lower off-state leakage current at VGS = -10 V and VDS = 5V of about 100 times less than that of the conventional one. It is attributed to the additional undoped offset region and the vacuum gap to reduce the maximum electric field at drain junction while ascribed to the sub-gate to maintain the on-current. Therefore, such a T-Gate poly-Si TFT is very suitable for the applications and manufacturing in active matrix liquid crystal displays (AMLCDs) and active matrix organic light emitting diodes (AMOLEDs).

Keywords

polycrystalmetalMo
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 910: Symposium A – Amorphous and Polycrystalline Thin-Film Silicon Science and Technology – 2006 , 2006 , 0910-A22-11
Copyright
Copyright © Materials Research Society 2006

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