Introduction

This chapter describes the integration and interface between the digital front-end and analog front-end with a focus on wireless terminals’ ASICs applications. This has been most dynamic over the past decade with rapid progress from a mostly discrete implementation platform to a single system-on-chip (SoC) ASIC that integrates the RF blocks with the Modem [1]. The pressure to perform with size, costs, and power constraints has fueled creativity in system and architecture designs and implementations in submicron CMOS processes. Such development efforts have revolutionized the types and means of digital-to-analog interfaces, which in turn have redefined ASIC partitions and popularized today’s mixed signal integration on a common substrate.

Traditionally, the digital front-end resides within the Modem baseband processor ASIC and seeks a partition with an analog baseband IQ interface to the RFIC transceiver. Such direct conversion transceiver architecture offers simplicity in analog design, and provides analog channel filtering and full dynamic gain range in the analog domain. The digital front-end can perform calibration functions in addition to pre-decoding and post-encoding functions. Such a device platform continues to see wide commercial applications in 3G ASICs implementation, mWiMax wireless terminal ASICs, as well as LTE datacard ASICs design.