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8 - EXTENDED INSTRUCTION SET ARCHITECTURES

Published online by Cambridge University Press:  05 June 2012

Harvey G. Cragon
Affiliation:
University of Texas, Austin
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Summary

INTRODUCTION

User ISAs, discussed in Chapter 3, provide operations, addresses, and data types for many types of scientific and business applications. However, these instructions are insufficient for processors used in modern systems with operating systems, virtual memory, concurrent I/O, and in multiprocessor configurations. Thus ISAs are extended to provide support for these additional tasks. Each of these extensions to the ISA requires special data types, addresses, and operations.

The programs that provide these extended services are usually written by system software providers, not by the user. To prevent user modification or tampering with these programs, the processors operate in one of two modes: user mode or supervisor mode.

The extensions to the ISA are collectively called control instructions in the IBM S360 documentation (IBM 1970), protected mode instructions in the Intel Pentium (Intel Corporation 1993), and privileged instructions in the Pentium Pro documentation (Intel Corporation 1996). In this text we use the term privileged instructions.

Privileged instructions cannot be executed along with the user instructions when the processor is in user mode. However, when in the supervisor mode, both user and privileged instructions can be executed. If a privileged instruction is attempted when the processor is in the user mode, an interrupt is generated in the decode stage of the pipeline. The separation between the privileged instructions and the user instructions is enforced in many computers by means of a mode control switch.

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Publisher: Cambridge University Press
Print publication year: 2000

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