The key challenges for memories that operate at the nanoscale and that are compatible with mainstream semiconductor processing are in achieving the performance characteristics that make the integration of hundreds of millions or more of such devices feasible. The concept of harnessing a single electron or just a few electrons for memory storage is very appealing, but among the issues to address are the increased variance, smaller signal, and numerous other consequences of the reduced statistics resulting from reduced number of carriers employed. Coupling a few electrons to a transistor channel provides a structure with the power gain and the necessary current for fast memory-state detection as well as compatibility with mainstream processing. Several recent ideas, such as the use of nanocrystals and defects, and decoupling storage from the read process, provide paths to addressing the issues of power, speed, technology compatibility, and variability in these structures.We discuss several approaches to nanoscale nonvolatile silicon memory, their attributes, and the underlying materials issues, with a focus on finding the design compromises necessary to enable their manufacturability.