Published online by Cambridge University Press: 07 August 2017
The CCD we use is TC215 manufactured by TI, Japan. The pixel size is 12 microns square. It is a virtual phase CCD which has a peak QE of 60% at 700 nm and 15% QE at 350 nm. It is commercially available in a package, which is too big to meet our requirement for CCD spacing. We therefore put the CCD in a specially made compact package. Each chip is mounted on a machined ceramic spacer whose thermal coefficient is matched with that of the CCD package. We glue each CCD chip on the spacer under a microscope to measure YHE x − y position and height. Then we screw the CCD chip + spacer on a copper motherboard with the help of the gauge which has a planned grid with a good accuracy. The alignment accuracy we can get with such set-up procedures is an order of 5 microns (< 0.5 pixel) in the horizontal direction and 10 microns in the vertical direction.