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The Effect of Microstructure and Processing Procedures on the Resistivity of Co-Sputtered W-Si Layers on GaAs Substrates
Published online by Cambridge University Press: 25 February 2011
Abstract
The relationship between microstructure, composition, resistivity and processing procedures of W-Si layers on (100) GaAs was examined for both “as deposited” specimens and specimens annealed at temperatures between 100°C and 1000°C. TEM, EDAX, SIMS, AUGER and four point probe resistivity measurements were employed.
The layers, exhibiting a columnar growth structure typical of sputter deposition, are amorphous below ≈ 800°C. At 700°C, the formation of pits, attributed to the outdiffusion of Ga and As into the W-Si layer, is observed at the W-Si/GaAs interface. The Ga and As outdiffusion was confirmed for temperatures above 700°C. The layers annealed between 800°C and 1000°C consist of a polycrystalline mixture of αW, βW and W5Si3 with coarse particles, thought to be W5Si3 precursors, formed along the W-Si/GaAs interface and protruding into the substrate. As the frequency of these protrusions increases with increasing temperature, the resistivity of the W-Si layers decreases.
Both the composition and the resistivity of the W-Si thin films are affected by the processing procedure. The Si/W ratio of the W-Si thin films decreases whilst their resistivity significantly increases as a result of etching away the Si3N4 capping layer using HF. It is thought that this is due to the removal of Si-oxides formed within the layer during the W and Si sputtering. The decrease in the Si/W ratio and the increase in resistivity are not observed if an A1N capping layer is used.
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