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Directions in the Chemical Mechanical Planarization Research

Published online by Cambridge University Press:  10 February 2011

Shyam P. Murarka*
Affiliation:
SRC Center for Advanced Interconnect Science and Technology Rensselaer Polytechnic Institute, Troy, NY 12180
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Abstract

Planarized surfaces have become key to the success of advanced semiconductor devises/circuits/chips. The planarization, achieved by the use of chemical mechanical means, has enabled the interconnection of ever increasing number of devices and also the use of lower resistivity copper as the interconnect material for such devices. Chemical mechanical planarization (CMIP) has now found application at several different stages of semiconductor chip fabrication and many other microelectronic applications. However, there remain a large number of nuances and effects e.g. pattern, chemical, and pad dependencies and scratching, that need to be carefully studied, evaluated and eliminated if we want to continue to progress in sub 0.1 µm (minimum feature size) regime, where the amounts of material to be removed will be small, surfaces will dominate the performance, and margin of error extremely small and unforgiving. This presentation will discuss the future needs, the CMP variables, the relationship of these variables to CMP behavior and planarity, scratch-free CMP, and size-impact on CMP outcome. A new set of goals will be presented and discussed.

Type
Research Article
Copyright
Copyright © Materials Research Society 2000

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References

REFERENCES

1. “Chemical Mechanical Planarization of Microelectronic Materials,” Steigerwald, J. M., Murarka, S. P., and Gutmann, R. J. (Wiley-Interscience, NY, 1997).10.1002/9783527617746Google Scholar
2. Hillenius, S. J., Lucent Technoogies, Murray Hill, NJ, Private Communication.Google Scholar
3. Li, W., Shin, D. W., Tomozawa, M., and Murarka, S. P., Thin Solid Films 270,601 (1995).Google Scholar
4. Runnels, S. R., J. Electochem Soc. 141, 1900 (1996).10.1149/1.2055024Google Scholar
5. Li, W., Shin, D. W., Tomozawa, M., and Murarka, S. P., Thin Solid Films 270, 601(1995).10.1016/0040-6090(96)80082-4Google Scholar
6. Steigerwald, J. M., Zirpoli, R., Murarka, S. P., Price, D. P., and Gutmann, R. J., in Proc. Adv. Metallization Conf. at Austin, TX Oct. 35 (1994), (MRS, Pittsburgh, 1995), p. 173.Google Scholar
7. Achutlan, K., Curry, J., Lacy, M., Campbell, D., and Babu, S. V., J. Electronic Materials 25 1628(1996).10.1007/BF02655587Google Scholar
8. Runnels, S. C., J. Electronic Materials 25, 1574(1996).10.1007/BF02655578Google Scholar
9. Kallingal, C. G., Tomozawa, M., and Murarka, S. P., J. Electrochem. Soc. 145, 1790(1998).10.1149/1.1838559Google Scholar
10. Tsui, T. Y. and Pharr, G. M., J. Mater-Res. 14, 292(1999).10.1557/JMR.1999.0042Google Scholar
11. Raja, M.Islam and Ali, I., in the Proc. of 1995 VMIC Conference, Santa Clara, CA (Univ. of South Florida, Tampa, FL, 1995), p. 453.Google Scholar
12. Hu, Y. - Z., Gutmann, R. J., and Murarka, S. P., Unpublished work (1996).Google Scholar
13. Sundararajan, S., Thakurta, D. G., Schwendeman, D. W., Murarka, S. P., and Gill, W. N., J. Electrochem. Soc. 146, 761(1999).10.1149/1.1391678Google Scholar
14. Ticky, J., Levert, J., Shan, L., and Danyluk, S., J. Electrochem. Soc. 146, (1999).Google Scholar
15. Nakamura, T., Akamatsu, K., and Arakawa, N., Bull. Japan Soc. Prec. Engg. 19 120 (1985).Google Scholar
16. Runnels, S. R. and Eyman, L. M., J. Electrochem. Soc. 141 1698 (1994).10.1149/1.2054985Google Scholar
17. Zhao, B. et al, paper presented at the Ist IITC San Francisco, June 1998.Google Scholar
18. Neirynck, J. M., Yang, G. - R., Murarka, S. P., and Gutmann, R. J., Thin Solid Films 290–291, 447 (1996).10.1016/S0040-6090(96)09033-5Google Scholar
19. Permana, D., Murarka, S. P., Lee, M. G., and Beilin, S. I., Electrochem. Soc. Proc. 96–22, 206 (1997), Electrochem. Soc. Pennington, NJ.Google Scholar
20. “Snatch-free CMP of Electronic Materials at Rensselaer - a Science-to-Engineering Approach,” Murarka, S. P., presentation at the Solid State Technology Chemical Mechanical Planarization Seminar, March 31, 1997, San Jose, CA. Google Scholar
21. Murarka, S. P., Mat. Rs. Soc. Symp. Proc. 511, 277(1998).10.1557/PROC-511-277Google Scholar
22. Steigerwald, J.M., Duquette, D. J., Murarka, S. P., and Gutmann, R. J., J. Electrochem. Soc. 142, 2379(1995).10.1149/1.2044305Google Scholar