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Characterization of Low Temperature Polysilicon TFTs with Self-Aligned Graded LDD Structure

Published online by Cambridge University Press:  17 March 2011

Ching-Wei Lin ,
Li-Jing Cheng ,
Yin-Lung Lu  and
Huang-Chung Cheng
Ching-Wei Lin
Affiliation:
Institute of Electronics, National Chiao Tung University, Hsinchu, 300, Taiwan, R.O.C.
Li-Jing Cheng
Affiliation:
Institute of Electronics, National Chiao Tung University, Hsinchu, 300, Taiwan, R.O.C.
Yin-Lung Lu
Affiliation:
Institute of Electronics, National Chiao Tung University, Hsinchu, 300, Taiwan, R.O.C.
Huang-Chung Cheng
Affiliation:
Institute of Electronics, National Chiao Tung University, Hsinchu, 300, Taiwan, R.O.C.
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Abstract

A simple process sequence for fabrication of low temperature polysilicon (LTPS) TFTs with self-aligned graded LDD structure was demonstrated. The graded LDD structure was self-aligned by side-etch of Al under the photo-resist followed by excimer laser irradiation for dopant activation and laterally diffusion. The graded LDD polysilicon TFTs were suitable for high-speed operation and active matrix switches applications because they possessed low-leakage-current characteristic without sacrificing driving capability significantly and increasing overlap capacitance. The leakage current of graded LDD polysilicon TFTs at Vd = 5V and Vg = −10V could attain to below 1pA/μm without any hygrogenation process, when proper LDD length and laser activation process were applied. The on/off current ratios of these devices were also above 108. Furthermore, due to graded dopant distribution in LDD regions, the drain electric field could be reduced further, and as a result, graded LDD polysilicon TFTs provided high reliability for high voltage operation.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 685: Symposium D – Advanced Materials and Devices for Large-Area Electronics , 2001 , D12.7.1
Copyright
Copyright © Materials Research Society 2001

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