The complexity of today’s commercial semiconductors has contributed to tremendous gains in device performance; millions of transistors are now packed into each square centimeter of silicon. The reduction of scale occurring within the semiconductor industry places extraordinary new demands on transmission electron microscopy: TEM is becoming a required precision measurement tool for manufacturing and a necessary analytical tool for R&D and failure analysis support. This paper reviews the industry’s needs for advanced TEM sample preparation, imaging and microanalysis and outlines the challenges presented to the TEM community as device dimensions continue along the National Technology Roadmap.

In the semiconductor industry, TEM is applied to process debugging, yield engineering, tool qualifications, single-bit failure analyses, and new process development. A large fraction of the analysis effort focuses on transistor, metal, interconnect and dielectric structures grown on and into the Si wafer. Fig. 1 shows a TEM image of a multilayer metal in a near-current generation microprocessor to illustrate the scale and nature of complexity.