The transistors planned for commercial use ten years from now in many electronic devices will have gate lengths shorter than 130 atoms, gate oxides thinner than 1.2 nm of SiO2 and clock speeds in excess of 10 GHz. It is now technologically possible to produce such transistors with gate oxides only 5 silicon atoms thick[l]. Since at least two of those 5 atoms are not in a local environment similar to either bulk Si or bulk SiO2, the properties of the interface are responsible for a significant fraction of the “bulk” properties of the gate oxide. However the physical (and especially their electrical) properties of the interfacial atoms are very different from .bulk Si or bulk SiO2. Further, roughness on an atomic scale can alter the leakage current by orders of magnitude.

In our studies of such devices, we found that thermal oxidation tends to produce Si/SiO2 interfaces with 0.1-0.2 nm rms roughness.