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How Many Microscopies Does It Take to Get to the Root Cause of the Fail? Sample Prep, Imaging, and In-Situ Analysis for Integrated Circuit Failure Analysis at the 14nm Node

Published online by Cambridge University Press:  30 July 2021

Lucile C Sheridan
Lucile C Sheridan*
Affiliation:
Wolfspeed, Cary, North Carolina, United States

Abstract

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Type
Microscopy and Microanalysis for Real World Problem Solving
Information
Microscopy and Microanalysis , Volume 27 , Supplement S1 , August 2021 , pp. 782 - 783
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Copyright
Copyright © The Author(s), 2021. Published by Cambridge University Press on behalf of the Microscopy Society of America

References

Arva, S., Kodali, S., Sheridan, L.C.T., Kalaizhagan, K., Oh, C.K.: “Nanoprobing based EBAC technique from backside as well as frontside to isolate logic fails for otherwise non-visual defects,” Proc. Int. Symp. Test. Fail Anal. (ISTFA), 2017.Google Scholar
Sheridan, L.C.T., Nedeau, D., “Combined SCM and Nanoprobing Study of Resistive Fails on SOI FinFET Devices”, Electronic Device Failure Analysis, Vol 22 (2), 2020.Google Scholar
Sheridan, L.C.T., Conohan, L., Oh, C.K.: “Fault Isolation of MOL and FEOL Buried Defects Using Conductive Atomic Force Microscopy as a Complement to Passive Voltage Contrast Imaging”, Proc. Int. Symp. Test. Fail Anal. (ISTFA), 2017.Google Scholar
Sheridan, L.C.T., Schaeffer, T., Wie, Y., Kodali, S., Oh, C.K.: “Die-Level Scanning Capacitance Microscopy Fault Isolation on SOI Fin-FET Devices for Advanced Semiconductor Nodes,” Proc. Int. Symp. Test. Fail Anal. (ISTFA), 2018.Google Scholar