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Beware of Artifacts When Characterizing Nanometer Device Features Smaller than a TEM Lamella Thickness in Semiconductor Wafer-foundries

Published online by Cambridge University Press:  27 August 2014

Wayne Zhao ,
Hugh Porter ,
Raghaw Rai ,
Esther (PY) Chen  and
Jeremy Russell
Wayne Zhao
Affiliation:
Engineering Analysis - Physical, Technology Development & Yield Engineering, Technology Development, GLOBALFOUNDRIES, Malta, New York, USA
Hugh Porter
Affiliation:
Engineering Analysis - Physical, Technology Development & Yield Engineering, Technology Development, GLOBALFOUNDRIES, Malta, New York, USA
Raghaw Rai
Affiliation:
Engineering Analysis - Physical, Technology Development & Yield Engineering, Technology Development, GLOBALFOUNDRIES, Malta, New York, USA
Esther (PY) Chen
Affiliation:
Engineering Analysis - Physical, Technology Development & Yield Engineering, Technology Development, GLOBALFOUNDRIES, Malta, New York, USA
Jeremy Russell
Affiliation:
Engineering Analysis - Physical, Technology Development & Yield Engineering, Technology Development, GLOBALFOUNDRIES, Malta, New York, USA

Abstract

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Type
Abstract
Information
Microscopy and Microanalysis , Volume 20 , Supplement S3: Proceedings of Microscopy & Microanalysis 2014 , August 2014 , pp. 1000 - 1001
Copyright
Copyright © Microscopy Society of America 2014 

References

[1] Zhao, W., et al., Microscopy & Microanalysis, Vol. 19(Supplement 2), (2013), pp.902~903.Google Scholar
[2] Zhao, W., et al., Proc. 38th International Symposium for Testing and Failure Analysis (2012), pp. 347~355.Google Scholar
[3] Zhao, W. & Proc, Symp. the Material Research Society, 2002 Fall Meeting (2002), Vol. 738, pp. G7.15.1~6.Google Scholar