Temperature dependent Hall effect, Fourier transform infrared absorption, and electron paramagnetic resonance (EPR) studies have been performed on both 6H and 4H vanadium doped semi-insulating SiC samples grown by the physical vapor transport technique. Nitrogen and boron concentrations have been measured in some samples by secondary ion mass spectrometry (SIMS). Unlike undoped s.i. SiC, where several different thermal ionization energies have been observed, the ionization energies for all of the vanadium doped s.i. samples studied here were found to cluster around only two values for the two polytypes, EC – 0.85 eV and EC – 1.54 eV for 6H and EC – 1.11 eV and EC – 1.57 eV for 4H. SIMS measurements indicate that the nitrogen concentration exceeds the boron concentration in samples with the shallower of two values while the opposite is true for the deeper level samples. EPR detected both V3+ and V4+ in shallower level samples while only V4+ was detected in the deeper level samples. These results indicate that the vanadium acceptor level, V3+/4+, is located at EC – 0.85 eV in 6H-SiC and EC – 1.11 eV in 4H-SiC. However, some EPR results do show a small, unexpected asymmetry in the angular dependence of the V4+ signal, most noticeably in the 4H samples. This suggests that at least some of the vanadium related levels might be complexed with another defect or be under higher local strain than expected.

Fabrication and characteristics of high voltage, high speed DMOSFETs in 4H-SiC are presented. The devices were built on 1.2×1016 cm-3 doped, 6 mm thick n-type epilayer grown on a n+ 4H-SiC substrate. A specific on-resistance of 8.7 mW-cm2 and a blocking voltage of 950 V were measured. Device characteristics were measured for temperatures up to 300oC. An increase of specific on-resistance by 35% observed at 300oC, when compared to the value at room temperature. This is due to a negative shift in MOS threshold voltage, which decreases the MOS channel resistance at elevated temperatures. This effect cancels out the increase in drift layer resistance due to a decrease in bulk electron mobility at elevated temperature, resulting in a temperature stable on-resistance. The device operation at temperatures up to 300 oC and high speed switching results are also reported in this paper.

In this paper, we demonstrate that high temperature and short time EBAS annealing is effective to obtain low sheet resistance without surface roughening in heavily Al-implanted 4H-SiC (0001) samples (Al concentration: 1.0 × 1021 /cm3, thickness: 0.3 microns, total dose: 2.6 × 1016 /cm2). The sheet resistance and rms surface roughness of the sample annealed at 1800 °C for 0.5 min is estimated to be 4.8k ohm/sq. and 0.82 nm, respectively. Also, we discuss the advantage of EBAS annealing for the suppression of surface roughening during annealing.

Electron paramagnetic resonance (EPR) and photo EPR measurements were performed on undoped semi-insulating (SI) 6H SiC material grown by the physical vapor transport (PVT) method. EPR lines from a carbon-related surface defect, two photosensitive high temperature stable intrinsic defects with S=1/2 and shallow nitrogen and boron were observed. The EPR spectrum of the intrinsic defect labeled XX was observed in the dark and consists of three single lines XX1, XX2, XX3 due to three inequivalent sites in the 6H SiC. The second defect labeled PP appeared in EPR spectrum during photo-excitation of the SI 6H SiC and consisted of a single EPR line. The photo EPR data placed the energy level of the defects in the region EV + 1.24 ÷ 1.29 eV. The EPR parameters and symmetry behavior of XX agree well with those of the carbon vacancy-related Ky center observed in p-type electron irradiated 6H SiC and we tentatively identify the XX defect with VC+. The electronic processes occurring in undoped SI 6H SiC under photo-excitation are also described.

Multiple 50 mm hybrid Si-on-SiC substrates consisting of thin film [100] Si (1 μm) on bulk semi-insulating [0001] 6H-SiC wafers were fabricated using low-temperature (150°C) wafer bonding and slicing techniques. A set of samples were prepared comparing various thicknesses of SiO2 (60, 120, 190, 240 and 520 nm) as an intermediate bonding layer between the two materials. A variety of test structures such as Van der Pauw structures, linear transfer-length measurement arrays and resistors were fabricated in the Si layers using standard Si processing (such as lithography, B-diffusion, etching and oxidation) in order to characterize the robustness as well as the electrical and thermal properties of the hybrid substrates. Bulk Si and Si-on-insulator (SOI) substrates were used for comparison. We report the Si layers on the hybrid Si-on-SiC substrates to be device-grade in terms of mobility and crystal structure, and that their device-to-device electrical isolation properties are superior to those of bulk Si and comparable to those of SOI. Furthermore, electrical test structures on hybrid Si-on-SiC substrates exhibit vastly superior heat dissipation compared to equivalent devices on bulk Si or SOI. Specifically, the temperature rise can be as much as 102°C lower in resistor devices made on Si-on-SiC (Tj= 191°C) compared to on bulk Si (Tj= 293C) under high-power density operation (67 kW/cm2). We also describe the effects of intermediate oxide thickness on thermal resistance.

Silicon carbide (SiC) substrates with chemical vapor deposition (CVD) grown epilayers have been characterized by synchrotron white beam X-ray topography (SWBXT). Large numbers of circular basal plane dislocation loops (BPDs) were observed in the substrate which were anchored by threading screw dislocations (SDs). Threading edge dislocations (TEDs) are not observed to play an important role in the multiplication of BPDs. A SD-assisted “conservative climb” model is proposed to explain the multiplication of BPDs during growth and/or post-growth processes. BPDs are shown to multiply on adjacent parallel basal planes via single SD-assisted as well as opposite sign SD-pair-assisted “conservative climb”.

Low-temperature homoepitaxial growth of 4H-SiC using halo-carbon precursors was further investigated to address the problems limiting increase of the growth rate of the defect-free epilayers at growth temperatures below 1300°C. Enhanced etching of Si clusters in the gas phase was achieved by adding HCl during the low-temperature growth. The effective Si/C ratio above the growth surface was increased as a result of reduced depletion of silicon vapor species by cluster condensation, which resulted in drastically improved epilayer morphology and significant increase of the growth rate. An intentional insitu nitrogen doping of epitaxial layers during 1300°C growth on Si and C faces revealed more than an order of magnitude higher nitrogen donor incorporation in the C-face epitaxial layers. Finally, a feasibility of selective epitaxial growth using low-temperature masking materials such as SiO2 was demonstrated.

Ni films are important as both Schottky junctions and Ohmic contacts for high temperature SiC devices. Ni/SiC Schottky junctions are observed to become Ohmic upon annealing. This transition has been attributed to changes in film microstructure. The experiments reported here compare the thermal behavior of Ni films deposited on standard 6H-SiC (0001) surfaces with films deposited on periodically stepped surfaces. The former were prepared by wet chemical etching and are typical of those used in device fabrication. The latter were prepared by high temperature hydrogen etching. Ni films ranging from monolayer to nominal device thickness (~50 nm) were annealed on both surfaces. Analysis of these surfaces by in-situ Auger electron spectroscopy (AES) and ex-situ atomic force microscopy (AFM) provided elemental, chemical and morphological information. The results show that the morphology and microstructure of annealed films are dependent on initial film thickness and substrate surface conditions.

We used Film Stress Measurement (FSM), Transmission Electron Microscopy (TEM), and High-Resolution X-ray Diffraction (HRXRD) techniques to obtain further knowledge with respect to the deformation, warpage, and stacking faults (SF's) that are induced in n-type 4H-SiC wafers and epilayers when subjected to mechanical polishing and high temperature (1150 oC) processing.

We combine high-k dielectrics with wide band gap semiconductors for new possibilities for high frequency and high power applications. We investigate the dielectric properties of Praseodymium based oxides and silicates by preparing MIS structures consisting of metal layer (M), PrOx (praseodymium oxide) as a high-k insulating layer (I), and silicon (Si) or silicon carbide (SiC) as semiconductor substrates (S). Our approach consists both, electrical measurements and spectroscopic characterization to analyze properties of the various interfaces within the stacks.

For the electrical measurements we produce PrOx layers in the thickness range of 10nm to 240nm. We use capacitance-voltage analysis and determine permittivity values of 8 to 20 depending on physical thickness resulting in an equivalent oxide thickness (EOT) down to 5nm. These data are consistent with the formation of a Pr-silicate between Si and PrOx.

In order to prevent interface reactions and to improve the band alignment an interfacial layer is introduced into the stack between the semiconductor and the high-k material. We find aluminum oxynitride (AlON) as a suitable layer which reduces the interface state density to a mean value of 5E11cm2/Vs and the leakage current (1V above flat band) below 1E-5A/cm2.

Highly oriented ?-Al2O3 thin films on 4H-SiC were engineered to demonstrate their potential as a crystalline high-k gate dielectric in SiC power MOSFETs. As-deposited Al2O3 thin films grown on 4H-SiC (0001) by thermal atomic layer deposition (ALD) were amorphous as determined by in-situ reflection high-energy electron diffraction (RHEED). Upon annealing in N2 at 1100°C, the film crystallized to the ?-Al2O3 phase as observed by RHEED, high-resolution transmission electron microscopy (HRTEM) and X-ray diffraction (XRD). Based on Fourier transforms of the HRTEM image, an epitaxial relationship of ?-Al2O3 (111) on 4H-SiC (0001) was observed in which ?-Al2O3 (-110) is oriented with 4H-SiC (-12-10). This orientation was further confirmed by XRD analysis in which only the ?-Al2O3 (111) and (222) peaks were observed. An abrupt interface of both amorphous and crystalline Al2O3 with 4H-SiC was determined by HRTEM.

In order to simplify a fabrication process of silicon carbide power MOSFETs (metal oxide semiconductor field effect transistors), development of a simultaneous formation process of ohmic contacts to both the p-well and n-source regions of the SiC devices using same contact materials and one step annealing was challenged. We succeeded to develop NiAl-based contact materials which provided ohmic behaviors for both n- and p-type 4H-SiC after one step annealing. The Ni/Al and Ni/Ti/Al ohmic contacts were prepared by depositing sequentially Ni, (Ti) and Al layers with various layer thicknesses onto the n- and p-type SiC substrates which were doped with N at 1 × 1019 cm-3 and with Al at 8 × 1018 cm-3, respectively. The Ni(50 nm)/Al(5 ~ 6 nm) contacts showed ohmic behaviors for both the n- and p-type SiC substrates after annealing at 1000 °C. The Ni(20 nm)/Ti(50 nm)/Al(50 ~ 70 nm) contacts showed ohmic behaviors for both the n- and p-type SiC substrates after annealing at a lower temperature of 800 °C. The specific contact resistances of these contacts were measured to be in the order of 10-3 Ω-cm2 for both p- and n-type SiC, and were found to have strong dependence of the Al layer thicknesses of materials. The interfacial microstructures of the NiAl-based contacts were also observed by transmission electron microscopy (TEM) to understand the current transport mechanism through the metal/SiC interfaces.

A-plane (11-20) and diagonal cut (1-102) and (-110-2) surfaces of 4H-SiC have been investigated using atomic force microscopy (AFM), low-energy electron diffraction (LEED), Auger electron spectroscopy (AES), X-ray photoemission spectroscopy (XPS) and scanning tunneling microscopy (STM). After hydrogen etching the surfaces show large, flat terraces. On SiC(11-20) steps down to single atomic heights are observed. On the diagonal cut surfaces steps run parallel and perpendicular to the [-1101] direction, yet drastically different morphologies for the two isomorphic orientations are found. All surfaces immediately display a sharp LEED pattern. For SiC(1-102) and SiC(-110-2) the additional significant presence of oxygen in the AES spectra indicates the development of an ordered oxide. All three surfaces show an oxygen free, well ordered surface after Si deposition and annealing. A transformation between different surface phases is observed upon annealing.

In this study, we investigated surface features formed by molten KOH etching of (000-1) substrates and epilayers, using scanning electron microscopy (SEM) and cross-sectional transmission electron microscopy (TEM). We found the surface features formed on (000-1) are protrusions, in contrast to well-known dimples on (0001).

Growth rates from 10 to 38 μm/h were achieved for heteroepitaxial 3C-SiC on Si (100) substrates by using the propane-silane-hydrogen gas chemistry with HCl as a growth additive. A low-pressure horizontal hot-wall CVD reactor was employed to perform the deposition. The growth rate dependences on silane mole fraction, the process pressure and the growth time were determined experimentally. The growth rate dependence on silane mole fraction was found to follow a linear relationship. The 3C-SiC films were characterized by Normaski Optical Microscopy, Scanning Electron Microscopy, Fourier Transform Infrared Spectroscopy, Atomic Force Microscopy and X-ray Diffraction. The X-ray rocking curve taken on the (002) diffraction plane displayed a FWHM of 360 arcsec which indicates that the films are monocrystalline.

Here we present optical beam induced current, electroluminescence, time resolved photoluminescence and current-voltage measurements on several 4H-SiC PiN diodes containing in-grown stacking faults (IGSFs). These defects were observed to act as either current shorts, creating a direct electrical contact between the p+ and n+ layers, or as a current barrier. Carrier lifetime measurements verify that the change in behavior is indeed associated with changes in the conductivity of the material in the vicinity of the defect and not due to local changes in the carrier lifetime. The IGSFs discussed here appear to differ from those previously discussed in the literature and may constitute a new, multi-layered IGSF.

Homologues with the general stoichiometry a(SiCl4) : bSi : cC : d(SiC) are shown to be potential precursors for the low-temperature gas-phase synthesis of silicon carbide. Thermal decomposition of these precursors yields the chemically stable gaseous species SiCl4 and condensed Si, C, SiC, SiC+Si, or SiC+C. Thermodynamic modeling of the thermal decomposition of octachlorotrisilane, Si3Cl8, is used to analyze the key features of the thermolysis of perchlorosilanes with the general stoichiometry a(SiCl4) : bSi. The equilibrium compositions of reaction products in the Si3Cl8+CO system are determined. This reaction system enables low-temperature (400 – 1200 K) synthesis of silicon carbide.

Today's state of the art silicon carbide (SiC) growth can produce semi-insulating crystals with a background doping around 5×1015 atoms/cm3 or lower. It is essential to have an accurate measurement technique with low enough detection limit to measure low level nitrogen concentration. Current SIMS detection limit of low E15 atoms/cm3 will provide accurate determination for nitrogen doping level of 5E16 at/cm3 or higher. In order to determine the lower nitrogen concentration, it is necessary to provide a better detection limit and to separate the contribution of background nitrogen properly. The “raster changing” method provides an accurate way to determine and remove contribution of background nitrogen to the signal, because secondary ion intensities and matrix ion intensities can be analyzed at the same location of the sample by changing the primary beam raster size during a profile. In this study we have succeeded in applying the raster changing method to (a) N in the SiC substrate located under an SiC epi layer, and (b) the detection of N as low as 3E14/ cm3 a bulk-doped SiC substrate.

Silicon carbide-based resistive gas sensors from our laboratory have been previously reported to detect hydrogen at concentrations ranging from less than 1% to 100% H2 in Ar and at temperatures ranging from 50°C to 450°C. The gas sensing mechanism for these devices was not well understood, hindering further improvement in this technology. In this report, resistive devices built on a thin 3C-SiC epitaxial layer grown on 150Å thick Si layer wafer bonded to a polycrystalline SiC substrate were studied. The polycrystalline SiC substrate is insulating, allowing the formation of isolated epitaxy resistors on the 3C-SiC layer. The gas sensing devices consisted of rectangular ohmic NiCr contacts with a Au overlayer fabricated on the 3C-SiC surface. Under a constant dc bias, nominally 10V in this study, these sensors demonstrated a decrease in current of up to ~25.4 mA upon the introduction of 100% H2, relative to 100% N2 in the test gas stream. The time constant for this device, estimated as a first-order exponential decay, was ~16-22 sec, with the full response occurring after ~90-120 sec. Upon the introduction of 100% H2 to the sensing environment, the device temperature, as measured by an resistance temperature detector (RTD) in intimate thermal contact with the device, decreased from 400°C to 237°C (ΔT = ~163°C). This large decrease in device temperature was driven by increased heat transfer coefficient of H2 relative to N2. The sensitivity to CH4 in N2, CO2 in N2 and He in Ar was also tested. Sensitivities, defined as the smallest change in concentration, as low as 300 ppm H2 in N2 were achieved with devices operating at 400°C and 10 V dc. Details of the device performance and a model of the sensing mechanism will be discussed.

The surface of 3C-SiC(001) single-crystal epilayers grown on Si(001) substrates is well known to be inhomogeneous and defective. Therefore, the control and understanding at the atomic scale of 3C-SiC surfaces is a key issue. We study the effect of hydrogen etching at different temperatures on the morphology of 3C-SiC(001) surfaces by using Nomarksi optical microscopy, atomic force microscopy (AFM) and scanning electron microscopy (SEM). As-grown 3C-SiC(001) samples have been hydrogen etched in a horizontal hot-wall chemical vapor deposition (CVD) reactor at atmospheric pressure for different times and temperatures. Flat, high-quality surfaces presenting defined atomic terraces were observed within the 3C-SiC grain boundaries after etching at 1200°C for 30 minutes. Higher etching temperatures resulted in surfaces with step bunching and enlarged surface defects. Samples etched under the best conditions have been studied using low-energy electron diffraction (LEED) and Auger electron spectroscopy (AES).